1. Field of the Invention
The present invention relates to a shift register circuit, and more particularly, to a shift register circuit in a driving circuit for a liquid crystal display device and a method of operating the same.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices display images by controlling an amount of light passing through a liquid crystal layer using an electric field. An LCD device includes a liquid crystal display (LCD) panel having a plurality of liquid crystal cells arranged in a matrix configuration and a driving circuit to drive the LCD panel.
The LCD panel includes gate lines and data lines crossing each other, and the liquid crystal cells are arranged near the crossing points of the gate lines and the data lines. The LCD panel also includes a common electrode and pixel electrodes for supplying an electric field to each of the liquid crystal cells. Each of the pixel electrodes is connected to one of the data lines through a source terminal and a drain terminal of a thin film transistor (TFT) of a switching element, and a gate terminal of the TFT is connected to one of the gate lines.
The driving circuit includes a gate driver for driving the gate lines and a data driver for driving the data lines. The gate driver drives the liquid crystal cells of the LCD panel by sequentially supplying a scanning signal to the gate lines. The data driver supplies a video signal to each of the data lines when a scanning signal is supplied to one of the gate lines. Accordingly, the LCD device controls an amount of light passing through each liquid crystal cell by an electric field supplied between the pixel electrode and the common electrode according to a video signal, thereby displaying images.
The TFT used for the LCD device is classified as the amorphous silicon TFT or the poly-silicon TFT according to the material used for the semiconductor layer of the TFT.
The amorphous silicon TFT is stable because uniformity of amorphous silicon is comparatively superior. However, it is difficult to implement an LCD device with a high resolution using the amorphous silicon TFT because the mobility of the amorphous silicon TFT is comparatively low. In other words, when the amorphous silicon TFT is used for manufacturing an LCD device, peripheral driving circuits such as the gate driver and the data driver should be separately manufactured and installed into the LCD device, which increases the manufacturing cost.
By way of comparison, the poly-silicon TFT can be used for an LCD device with a high resolution because the poly-silicon TFT has a superior mobility of electric charge. Also, peripheral driving circuits can be embedded in a liquid crystal panel. Therefore, the manufacturing cost can be reduced. Accordingly, LCD devices using the poly-silicon TFT are becoming popular.
FIG. 1 is a block diagram illustrating an LCD device using a poly-silicon thin film transistor according to the related art.
Referring to FIG. 1, the LCD includes an image display unit 12; a LCD panel 10 having a data shift register 14, a gate shift register 16 and a sampling switch array 15; a printed circuit board (PCB) 20 having a control chip 22 integrated with a control circuit and a data drive integrated circuit (IC), and a level shifter array 24; and a flexible printed circuit (FPC) film 18 for electrically connecting the LCD panel 10 and the PCB 20.
The image display unit 12 displays an image through a plurality of liquid crystal cells arranged in a matrix configuration. Each of the liquid crystal cells includes a switching element, a poly-silicon TFT, located near the crossing points of gate lines (GL) and data lines (DL). Because the mobility of poly-silicon is about 100 times greater than that of amorphous silicon, the poly-silicon TFT has a fast response speed. As a result, the liquid crystal cells are driven by a dot sequential scheme.
The data lines (DL) receive video signals from the sampling switch array 15 driven by the data shift register 14 and the gate lines (GL) receive scan pulses from the gate shift register 16.
The data shift register 14 includes a plurality of stages, each of which has an output terminal connected to a sampling switch of the sampling switch array 15. The plurality of the stages are dependently coupled to each others, as illustrated in FIG. 2. Accordingly, each of the stages sequentially supplies a sampling signal to a sampling switch by shifting a source start pulse outputted from the control chip 22.
Referring to FIG. 2, each of the stages ST1 to STn is dependently connected to a source start pulse input line and is also connected to three clock signal supplying lines of four-phase clock signal supplying lines.
FIG. 3 shows an example of the four-phase clock signals C1 to C4 supplied to the plurality of the stages ST1 to STn. The data shift register shifts the start pulse SP by one clock using three clock signals of the four-phase clock signals C1 to C4. Output signals SO1 to SOn outputted from the stages ST1 to STn are supplied as a sampling signal and a start pulse of the immediately following stage.
The gate shift register 16 includes a plurality of stages, each of which has an output terminal connected to each of the gate lines. In a similar manner as described with respect to the data shift register 14, the plurality of stages in the gate shift register 16 are dependently coupled to each others and each of the stages supplies a scan pulse to one of the gate lines by shifting a start pulse outputted from the control chip 22.
The sampling switch array 15 includes a plurality of sampling switches (not shown), each of which has an output terminal connected to one of the data lines DL and is driven by a sampling signal from the data shift register 14. The sampling switch array 15 sequentially samples a video signal outputted from the control chip 22 in response to the sampling signal and supplies the sampling result to the data lines DL.
The data shift register 14, the sampling switch array 15 and the gate shift register 16 of the LCD panel 10 are formed by a similar process, because the poly-silicon transistors are used to construct them. The manufacturing cost of such an LCD device may be reduced by constructing the LCD panel 10 with an identical type of the poly-silicon TFT such as an NMOS or PMOS TFT instead of using a CMOS TFT.
When using the CMOS TFT, a wide range of operating voltage and high circuit integrity can be achieved because the CMOS TFT includes both P channel and N channel. However, manufacturing a LCD panel using the CMOS TFT requires many processes, thereby increasing the manufacturing cost and degrading the reliability. Accordingly, the PMOS or NMOS TFT is widely used to manufacture the LCD panel 10 to lower the manufacturing cost and provide a high reliability, as compared with the CMOS TFT.
A control circuit (not shown) included in the control chip 22 transfers externally supplied video data to the data driving IC (not shown) and provides driving control signals to the data shift register 14 and the gate shift register 15. The data driving IC (not shown) converts the video data inputted from the control circuit (not shown) to digital video data and supplies the digital video data to the sampling switch array 15 through the FPC film 18.
The level shifter array 24 amplifies a swing width (or swing voltage) of the driving control signals i.e., clock signals inputted from the control circuit and supplies the amplified driving control signals to the data shift register 14 and the gate shift register 16. For example, the level shifter array 24 level-shifts a clock signal having a swing voltage lower than 10V, which is generated from the control circuit, to a clock signal having a swing voltage greater than 10V including a negative voltage. This is because a clock signal having a swing voltage greater than 10V is required to drive the TFTs in the LCD panel 10. In other words, when the PMOS TFTs are used for the LCD panel 10, a driving control signal having a swing voltage greater than 10V including a negative voltage is required for driving the PMOS TFTs included in the sampling switch array 15 and the image display unit 12.
However, it is generally difficult to generate such a clock signal having a swing width greater than 10V including a negative voltage using an external chip such as the control chip 22. In other words, it is difficult to manufacture an integrated chip that can generate a clock signal having a swing width greater than 10 V or a negative voltage.
Accordingly, the level shifter array 24 according to the related art is manufactured as a separate chip and mounted on the PCB 20 for level-shifting the driving control signals inputted from the control chip 22. In such a case, the circuit structure on the PCB 20 becomes complicated and a large amount of electric power is consumed, because a clock signal having a swing voltage greater than 10V including both positive and negative voltages should be supplied from an external circuit to the data shift register 14 and the gate shift register 16 of the liquid crystal panel 10.